Fabrication of semiconductor integrated circuits (IC) is a complex process that involves several hundred or more operations to make a single circuit device. Their fabrication is done by selectively implanting impurities into, and applying conductive and insulated layers onto, a semiconductor substrate. Semiconductor IC (chips) are not manufactured individually, but rather as an assembly of a hundred or more circuits on a "wafer," which is then diced up to produce the individual products dies or chips.

Increasing production yield is an ongoing challenge in the manufacture of semiconductor chips. Various defects can occur in the fabrication of a wafer, which leads to significant numbers of wafer die being classified as waste, and then discarded for one reason or another. Discarded dies decrease the percentage of die yield per wafer, and drives up the cost of an individual chip or chip set.

Defects are routinely caused by imperfections introduced during the many processing steps required to make a product or an IC device. Examples of process steps that correlate with defects the most are in the areas of photoresist, photomask, etch, clean and diffusion operations. 

These imperfections can come from normal materials-use processes as simple as changing feed material vessels or containers. They materialize as particles, impurities or shifts in concentration.

Yield impacts are directly proportional to the number of wafer starts, particularly at the inception of production needed to meet specific customer order quantities. With the high demand for semiconductor chips, increasing yield is paramount. 

Utilizing defect information to remove yield-reducing causes is an important aspect of improving the efficiency, and hence output, of any fabrication facility.

Wafer scanning tools are widely utilized today to identify defects that occur in the chip manufacturing process for the above-mentioned reasons. These tools are located at a variety of positions along the production line, and consist of automated-metrology-vision inspection stations for identifying irregularities in the wafer die as they move through the production lines. These scanning tools have lead the industry into real-time process vision, and yield prediction modeling.

Armed with the data from these tools, factories have been able tie the impacting gas and chemical deviation directly to yield. This has necessitated the drive to monitor, and control tightly, the assay and purity of the chemicals and gasses involved in the manufacturing of the IC devices themselves. It has also ushered in the use of real-time materials monitoring metrology in the feed lines to the factory's processing tools. This monitoring has the intent to be predictive to a factory’s yield impacts.

The data derived out of these real-time vision tools has begun to evolve typical semiconductor facility chemical and gas supply processes with more and more emphasis given to centralized dilutions, blending, or mixing added within the distribution infrastructure of these products.

With a centralized approach preferred over on-board methods, the intent has been to align the factory's complete tool-set performances and increase overall yield through the centralized methods. By allowing a more consistent recipe delivery methodology in tools and processes, which fit into the predictive models more uniformly, DFS’s product designs are driven for these purposes.